Ricerc@Sapienza

For the hardware architecture two equivalent options are envisioned and under study: a system based on conventional commodity CPUs computing farm, or a mixed system exploit parallel processing power of modern high-end multicore GPU based systems. In case the CPU farm solution is chosen it is foreseen to install the HLST event selection farm in one of two racks hosting the L0T and FET processors, the local storage and the network switch apparatus. A dedicated machine with 4 Xeon-E5-2650V3 class processors with 10 physical cores each, 512 GB RAM used as I/O buffer and 2 10 Gbit/s ETH fiber interfaces is dedicated to run the L0T and Event building, while 10 1U rack mountable machines with 2 Xeon-E5-2650V3 class processors, 128 GB RAM and 2 10 Gbit/s ETH fiber interface and 2 × 1 TB2 NLSAS HD storage system will be able to sustain the reconstruction of events at offline level at rates up to 400Hz. In case the GPU solution is chosen, the entire CPU part of the system can be replaced by a NVIDIA high-end GPU rack- mountable system, like for example the NVIDIA DGX-1 system, with 2 Intel Xeon CPUs with 512 GB
RAM and 8 Tesla P100 class boards (30720 physical cores) with 16 GB HBM2 memory each, connected with
NVLink GPU to GPU bidirectional link at 10 GB/s, 7 TB SSD storage ad dual 10 Gbit/s Ethernet interface.
Both systems will be able to fulfill the requirements needed for the DarkSide-20k HLST trigger system.
The GPU solution allows in addition to implement highly parallel techniques for S2 signal reconstruction from the stored waveforms, for 3D reconstruction of the position of the interaction via multivariate pattern-recognition techniques, and, if needed, for offline optimal filtering of the SPE waveform to extract a precise timing information for S1 and PSD.
The project we intend to pursue with the present grant request is to setup a test-bed for DS20K daq studies. The test-bed will comprise a small cryogenic system (a dewar allowing to place a standard Darkside-20k photo-detector module in Liquid Nitrogen) with a few penetrations for power and signal output, a prototype receiver and readout board, and a minimal HLST system comprised of a network switch and server. The system will allow to develop and test the software framework and algorithm that will be part of the DS20K trigger system, the digital filters required to extract timing and charge information from photo-detector modules, and to develop the appropriate firmware to implement the readout as specified above. These studies will be necessary in order to finalize the design of the system and to achieve a full qualification of the performances in terms of time resolution of the new large area cryogenic SiPM sensors developed for Darkside but also of interest for other scientific and medical application (e.g. long baseline neutrino detector based on LAr, PET etc. ). The prototype readout board we are considering is developed within the INFN sezione di Roma, and first prototype will be available in the Fall. Initially the system can be exercised using predefined test traces from other measurements or simulations, so that in a first phase the cryogenic system will not be necessary, furthermore the first pre-production photo-detector modules will only be available at the end of 2019.