Pubblicazioni

Impact of the gate and insulator geometrical model on the static performance and variability of ultrascaled silicon nanowire FETs

2018 - IEEE TRANSACTIONS ON ELECTRON DEVICES
Logoteta, D; Cavassilas, N; Cresti, A; Pala, M G; Bescond, M

Assessment of the electrical performance of short channel InAs and strained Si nanowire FETs

2017 - IEEE TRANSACTIONS ON ELECTRON DEVICES
Grillet, C; Logoteta, D; Cresti, A; Pala, M G

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