Salta al contenuto principale
Ricerc@Sapienza
Toggle navigation
Home
Login
Home
Pubblicazioni
"Lecture Notes in Electrical Engineering"
"industrial and manufacturing engineering"
"VHDL"
Pubblicazioni
Pubblicazioni
Geometry scaling impact on leakage currents in FinFET standard cells based on a logic-level leakage estimation technique
2018 - Lecture Notes in Electrical Engineering
Abbas, Zia; Zahra, Andleeb;
Olivieri, Mauro
;
Mastrandrea, Antonio
© Università degli Studi di Roma "La Sapienza" - Piazzale Aldo Moro 5, 00185 Roma