Ricerc@Sapienza

Power analysis attacks (PAAs), a class of side-channel attacks based on power consumption measurements, are a major concern in the protection of secret data stored in cryptographic devices. In this paper, we introduce the secure double rate registers (SDRRs) as a register-transfer level (RTL) countermeasure to increase the security of cryptographic devices against PAAs. We exploit the SDRR in a conventional advanced encryption standard (AES)-128 architecture, improving the immunity of the cryptographic hardware to the state-of-the-art PAAs.

The fog computing paradigm brings together storage, com-munication, and computation resources closer to users’ end-devices.Therefore, fog servers are deployed at the edge of the network, offeringlow latency access to users. With the expansion of such fog computingservices, different providers will be able to deploy multiple resourceswithin a restricted geographical proximity.In this paper, we investigate an incentive-based cooperation schemeacross fog providers.

We study the following synchronous process that we call repeated balls-into-bins. The process is started by assigning n balls to n bins in an arbitrary fashion. In every subsequent round, one ball is extracted from each non-empty bin according to some fixed strategy (random, FIFO, etc), and re-assigned to one of the n bins uniformly at random. We define a configuration legitimate if its maximum load is (Formula presented.).

This study investigates the actual use of acceleration lanes by means of traffic micro-simulations in proximity to the convergence between the main and the secondary traffic streams. The data needed to develop the micro-simulation model were collected videotaping two acceleration lanes of an Italian highway, near the village of San Liberato. The relevant microsimulation model has been developed utilizing a commercial software, the TransModeler traffic simulation package, while the calibration and validation phases have been realized based on real-life data.