Ricerc@Sapienza

Emerging non-volatile memory technologies prompt for storage mechanism alternative to charge and materials different from silicon. However, silicon is always preferred by the electronic industries, as it rules the current fabrication technology of integrated circuits. For this reason, more than ever, today silicon at the nanoscale is asked to engrave new paths to semiconductor industry, mainly due to its extraordinary physical and electronic properties in comparison to bulk ones. In this one-year project, I propose the use of silicon nanowires (SiNWs) as the storing component of two-terminal non-volatile memory devices. In particular, the project aims to perform engineering of a new family of Programmable Read Only Memory (PROM), also called One Time Programmable (OTP) proposed a couple of years ago. The idea starts from the fact that at the Centro per le Nanotecnologie applicate all¿ Ingegneria Sapienza (CNIS) a few months ago it has been demonstrated by one researcher of this group that silicon nanowires can be fabricated at low-temperature with different crystallographic structures, namely a metastable body centered cubic configuration (BC8) featuring low resistance and the conventional stable face centered cubic configuration (FCC) featuring high resistance. The core of this one-year project is to optimize conditions for the switch of the metastable BC8 state into the stable FCC state in an electrical way, forcing a current to flow along the nanowire and causing local heat dissipation by Joule effect which makes the metastable state to switch into the stable one. The challenge is identifying the proper voltage waveforms able to switch the memory, in a controlled and reproducible way. If this was verified, it poses the basis for an innovative memory architecture of Programmable Read Only Memory.