Riccardo Della Sala

Pubblicazioni

Titolo Pubblicato in Anno
A 2.5 GHz, 0.6 V body driven dynamic comparator exploiting charge pump based dynamic biasing PRIME 23. 18th International conference on Ph.D. research in microelectronics and electronics 2023
An improved strong arm comparator with integrated static preamplifier IEEE ACCESS 2023
An ultra-low-voltage class-AB OTA exploiting local CMFB and body-to-gate interface AEÜ. INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS 2022
A Tree-Based Architecture for High-Performance Ultra-Low-Voltage Amplifiers JOURNAL OF LOW POWER ELECTRONICS AND APPLICATIONS 2022
A Standard-Cell-Based CMFB for Fully Synthesizable OTAs JOURNAL OF LOW POWER ELECTRONICS AND APPLICATIONS 2022
High-efficiency 0.3V OTA in CMOS 130nm technology using current mirrors with gain PRIME 22: 17th Conference on Ph.D. Research in Microelectronics and Electronics 2022
A Novel Differential to Single-Ended Converter for Ultra-Low-Voltage Inverter-based OTAs IEEE ACCESS 2022
High-Throughput FPGA-Compatible TRNG Architecture Exploiting Multistimuli Metastable Cells IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS 2022
A Lightweight {FPGA} Compatible Weak-{PUF} Primitive Based on {XOR} Gates IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. II, EXPRESS BRIEFS 2022
A Novel Ultra-Compact {FPGA}-Compatible {TRNG} Architecture Exploiting Latched Ring Oscillators IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. II, EXPRESS BRIEFS 2022
Enabling ULV Fully Synthesizable Analog Circuits: the BA Cell, a Standard-Cell-Based Building Block for Analog Design IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. II, EXPRESS BRIEFS 2022
Sub-μW Front-End Low Noise Amplifier for Neural Recording Applications PRIME 22: 17th Conference on Ph.D. Research in Microelectronics and Electronics 2022
A Differential-to-Single-Ended Converter Based on Enhanced Body-Driven Current Mirrors Targeting Ultra-Low-Voltage OTAs ELECTRONICS 2022
The DD-Cell: a Double Side Entropic Source exploitable as PUF and TRNG 2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME) 2022
A 0.3 V, rail-to-rail, ultralow-power, non-tailed, body-driven, sub-threshold amplifier APPLIED SCIENCES 2021
A 0.3 V rail-to-rail ultra-low-power OTA with improved bandwidth and slew rate JOURNAL OF LOW POWER ELECTRONICS AND APPLICATIONS 2021
SC-DDPL as a countermeasure against static power side-channel attacks CRYPTOGRAPHY 2021
A novel OTA architecture exploiting current gain stages to boost bandwidth and slew-rate ELECTRONICS 2021
A novel ultra-compact FPGA PUF: The DD-PUF CRYPTOGRAPHY 2021
Area-efficient low-power bandpass Gm-C filter for epileptic seizure detection in 130nm CMOS 2019 26th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2019 2019

ERC

  • PE6_1
  • PE6_2
  • PE6_3
  • PE6_5

KET

  • Rapid Prototyping e Additive Manufacturing
  • Big data & computing
  • Micro/nano electronics & photonics

Interessi di ricerca

His main research interests include the design and development of analog and digital PUFs for hardware security and the development and validation of TRNGs.
Furthermore, in the context of analog design, his research activity is focused on ultra-low voltage ultra-low power topology for IOT and biomedical applications.

Keywords

operational transconductance amplifier
Low power architecture
cyber-physical security
FPGA

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