Pubblicazioni

Design of low-voltage power efficient frequency dividers in folded MOS current mode logic

2021 - IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS
Centurelli, F.; Scotti, G.; Trifiletti, A.; Palumbo, G.

Delay models and design guidelines for MCML gates with resistor or PMOS load

2020 - MICROELECTRONICS JOURNAL
Centurelli, F.; Scotti, G.; Trifiletti, A.; Palumbo, G.

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