Francesco Centurelli

Pubblicazioni

Titolo Pubblicato in Anno
Rail to Rail ICMR and High Performance ULV Standard-Cell-Based Comparator for Biomedical and IoT Applications IEEE ACCESS 2024
Nonlinear Adaptive Biasing for Low-Voltage Class-AB OTAs SIE 23: 54th Annual Meeting of the Associazione Società Italiana di Elettronica 2024
An Ultra Low Voltage Physical Unclonable Function Exploiting Body-Driven Feedbacks SIE 23: 54th Annual Meeting of the Associazione Società Italiana di Elettronica 2024
A Novel High Performance Standard-Cell Based ULV OTA Exploiting an Improved Basic Amplifier IEEE ACCESS 2024
Body biasing techniques for dynamic comparators: a systematic survey ELECTRONICS 2024
On the Feasibility of Cascode and Regulated Cascode Amplifier Stages in ULV Circuits Exploiting MOS Transistors in Deep Subthreshold Operation IEEE ACCESS 2024
A Detailed Model of Cyclostationary Noise in Switched-Resistor Circuits IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS 2023
A 0.3 V Three-Stage Body-Driven OTA Proceedings of SIE 2022 Annual Meeting of the Italian Electronics Society 2023
A Monostable Physically Unclonable Function Based on Improved RCCMs with 0–1.56% Native Bit Instability at 0.6–1.2 V and 0–75 °C ELECTRONICS 2023
A 0.3V Rail-to-Rail Three-Stage OTA With High DC Gain and Improved Robustness to PVT Variations IEEE ACCESS 2023
A High Performance 0.3 V Standard-Cell-Based OTA Suitable for Automatic Layout Flow APPLIED SCIENCES 2023
A 0.15-to-0.5 V Body-Driven Dynamic Comparator with Rail-to-Rail ICMR JOURNAL OF LOW POWER ELECTRONICS AND APPLICATIONS 2023
A body-driven rail-to-rail 0.3 V operational transconductance amplifier exploiting current gain stages INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS 2023
A novel parallel digitizer with a pulseless mixing-filtering-processing architecture and Its implementation in a SiGe HBT technology at 40GS/s IEEE ACCESS 2023
Standard-cell-based comparators for ultra-low voltage application. Analysis and Comparisons CHIPS 2023
High-accuracy low-cost generalized complex pruned Volterra models for nonlinear calibration IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS 2023
A novel ultra-low voltage fully synthesizable comparator exploiting NAND gates PRIME 23. 18th International conference on Ph.D. research in microelectronics and electronics 2023
Robust body biasing techniques for dynamic comparators PRIME 23. 18th International conference on Ph.D. research in microelectronics and electronics 2023
A 2.5 GHz, 0.6 V body driven dynamic comparator exploiting charge pump based dynamic biasing PRIME 23. 18th International conference on Ph.D. research in microelectronics and electronics 2023
Wide-Band Shared LNA for Large Scale Neural Recording Applications SMACD 23: International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design 2023

ERC

  • PE7_5
  • PE7_6

KET

  • Micro/nano electronics & photonics

Interessi di ricerca

low power electronics, high speed electronics, analog and mixed-signal microelectronics, analog-to-digital converters

Keywords

very low voltage
class AB
operational amplifiers
analog circuits
ADC

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