Pubblicazioni

Delay models and design guidelines for MCML gates with resistor or PMOS load

2020 - MICROELECTRONICS JOURNAL
Centurelli, F.; Scotti, G.; Trifiletti, A.; Palumbo, G.

A multi-folded MCML for ultra-low-voltage high-performance in deeply scaled CMOS

2020 - IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS. I, REGULAR PAPERS
Palumbo, G.; Scotti, G.

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